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• 1. [Article] Impact of Isothermal Aging and Testing Temperature on Large Flip-Chip BGA Interconnect Mechanical Shock Performance

  The stability of solder interconnects in a mechanical shock environment is crucial for large body size flip-chip ball grid array (FCBGA) electronic packages. Additionally, the junction temperature increases ...

  Citation × Citation Citation Abstract Copy Title: Impact of Isothermal Aging and Testing Temperature on Large Flip-Chip BGA Interconnect Mechanical Shock Performance Author: Lee, Tae-Kyu, Chen, Zhiqiang, Guirguis, Cherif, Akinade, Kola Year: 2017 The stability of solder interconnects in a mechanical shock environment is crucial for large body size flip-chip ball grid array (FCBGA) electronic packages. Additionally, the junction temperature increases with higher electric power condition, which brings the component into an elevated temperature environment, thus introducing another consideration factor for mechanical stability of interconnection joints. Since most of the shock performance data available were produced at room temperature, the effect of elevated temperature is of interest to ensure the reliability of the device in a mechanical shock environment. To achieve a stablea interconnect pound in a dynamic shock environment, the interconnections must tolerate mechanical strain, which is induced by the shock wave input and reaches the particular component interconnect joint. In this study, large body size (52.5 x 52.5 mm(2)) FCBGA components assembled on 2.4-mm-thick boards were tested with various isothermal pre-conditions and testing conditions. With a heating element embedded in the test board, a test temperature range from room temperature to 100A degrees C was established. The effects of elevated temperature on mechanical shock performance were investigated. Failure and degradation mechanisms are identified and discussed based on the microstructure evolution and grain structure transformations. Title: Impact of Isothermal Aging and Testing Temperature on Large Flip-Chip BGA Interconnect Mechanical Shock Performance Author: Lee, Tae-Kyu, Chen, Zhiqiang, Guirguis, Cherif, Akinade, Kola Year: 2017 The stability of solder interconnects in a mechanical shock environment is crucial for large body size flip-chip ball grid array (FCBGA) electronic packages. Additionally, the junction temperature increases with higher electric power condition, which brings the component into an elevated temperature environment, thus introducing another consideration factor for mechanical stability of interconnection joints. Since most of the shock performance data available were produced at room temperature, the effect of elevated temperature is of interest to ensure the reliability of the device in a mechanical shock environment. To achieve a stablea interconnect pound in a dynamic shock environment, the interconnections must tolerate mechanical strain, which is induced by the shock wave input and reaches the particular component interconnect joint. In this study, large body size (52.5 x 52.5 mm(2)) FCBGA components assembled on 2.4-mm-thick boards were tested with various isothermal pre-conditions and testing conditions. With a heating element embedded in the test board, a test temperature range from room temperature to 100A degrees C was established. The effects of elevated temperature on mechanical shock performance were investigated. Failure and degradation mechanisms are identified and discussed based on the microstructure evolution and grain structure transformations. Close

• 2. [Article] Impact of an Elevated Temperature Environment on Sn-Ag-Cu Interconnect Board Level High-G Mechanical Shock Performance

  The mechanical stability of Sn-Ag-Cu interconnects with low and high silver content against mechanical shock at room and elevated temperatures was investigated. With a heating element-embedded printed ...

  Citation × Citation Citation Abstract Copy Title: Impact of an Elevated Temperature Environment on Sn-Ag-Cu Interconnect Board Level High-G Mechanical Shock Performance Author: Lee, Tae-Kyu, Chen, Zhiqiang, Baty, Greg, Bieler, Thomas R., Kim, Choong-Un Year: 2016 The mechanical stability of Sn-Ag-Cu interconnects with low and high silver content against mechanical shock at room and elevated temperatures was investigated. With a heating element-embedded printed circuit board design, a test temperature from room temperature to 80°C was established. High impact shock tests were applied to isothermally pre-conditioned ball-grid array interconnects. Under cyclic shock testing, degradation and improved shock performances were identified associated with test temperature variation and non-solder mask defined and solder-mask defined pad design configuration differences. Different crack propagation paths were observed, induced by the effect of the elevated temperature test conditions and isothermal aging pre-conditions. Title: Impact of an Elevated Temperature Environment on Sn-Ag-Cu Interconnect Board Level High-G Mechanical Shock Performance Author: Lee, Tae-Kyu, Chen, Zhiqiang, Baty, Greg, Bieler, Thomas R., Kim, Choong-Un Year: 2016 The mechanical stability of Sn-Ag-Cu interconnects with low and high silver content against mechanical shock at room and elevated temperatures was investigated. With a heating element-embedded printed circuit board design, a test temperature from room temperature to 80°C was established. High impact shock tests were applied to isothermally pre-conditioned ball-grid array interconnects. Under cyclic shock testing, degradation and improved shock performances were identified associated with test temperature variation and non-solder mask defined and solder-mask defined pad design configuration differences. Different crack propagation paths were observed, induced by the effect of the elevated temperature test conditions and isothermal aging pre-conditions. Close

• 3. [Article] Microstructural Evolution of SAC305 Solder Joints in Wafer Level Chip-Scale Packaging (WLCSP) with Continuous and Interrupted Accelerated Thermal Cycling

  Four high-strain design wafer level chip scale packages were given accelerated thermal cycling with a 10°C/min ramp rate and 10 min hold times between 0°C and 100°C to examine the effects of continuous ...

  Citation × Citation Citation Abstract Copy Title: Microstructural Evolution of SAC305 Solder Joints in Wafer Level Chip-Scale Packaging (WLCSP) with Continuous and Interrupted Accelerated Thermal Cycling Author: Zhou, Quan, Zhou, Bite, Lee, Tae-Kyu, Bieler, Thomas Year: 2016 Four high-strain design wafer level chip scale packages were given accelerated thermal cycling with a 10°C/min ramp rate and 10 min hold times between 0°C and 100°C to examine the effects of continuous and interrupted thermal cycling on the number of cycles to failure. The interruptions given two of the samples were the result of periodic examinations using electron backscattered pattern mapping, leading to room temperature aging of 30 days–2.5 years after increments of about 100 cycles at several stages of the cycling history. The continuous thermal cycling resulted in solder joints with a much larger degree of recrystallization, whereas the interrupted thermal cycling tests led to much less recrystallization, which was more localized near the package side, and the crack was more localized near the interface and had less branching. The failure mode for both conditions was still the same, with cracks nucleating along the high angle grain boundaries formed during recrystallization. In conditions where there were few recrystallized grains, recovery led to formation of subgrains that strengthened the solder, and the higher strength led to a larger driving force for crack growth through the solder, leading to failure after less than half of the cycles in the continuous accelerated thermal cycling condition. This work shows that there is a critical point where sufficient strain energy accumulation will trigger recrystallization, but this point depends on the rate of strain accumulation in each cycle and various recovery processes, which further depends on local crystal orientations, stress state evolution, and specific activated slip and twinning systems. Title: Microstructural Evolution of SAC305 Solder Joints in Wafer Level Chip-Scale Packaging (WLCSP) with Continuous and Interrupted Accelerated Thermal Cycling Author: Zhou, Quan, Zhou, Bite, Lee, Tae-Kyu, Bieler, Thomas Year: 2016 Four high-strain design wafer level chip scale packages were given accelerated thermal cycling with a 10°C/min ramp rate and 10 min hold times between 0°C and 100°C to examine the effects of continuous and interrupted thermal cycling on the number of cycles to failure. The interruptions given two of the samples were the result of periodic examinations using electron backscattered pattern mapping, leading to room temperature aging of 30 days–2.5 years after increments of about 100 cycles at several stages of the cycling history. The continuous thermal cycling resulted in solder joints with a much larger degree of recrystallization, whereas the interrupted thermal cycling tests led to much less recrystallization, which was more localized near the package side, and the crack was more localized near the interface and had less branching. The failure mode for both conditions was still the same, with cracks nucleating along the high angle grain boundaries formed during recrystallization. In conditions where there were few recrystallized grains, recovery led to formation of subgrains that strengthened the solder, and the higher strength led to a larger driving force for crack growth through the solder, leading to failure after less than half of the cycles in the continuous accelerated thermal cycling condition. This work shows that there is a critical point where sufficient strain energy accumulation will trigger recrystallization, but this point depends on the rate of strain accumulation in each cycle and various recovery processes, which further depends on local crystal orientations, stress state evolution, and specific activated slip and twinning systems. Close