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• 1. [Article] Instability and temperature-dependence assessment of IGZO TFTs

  Amorphous oxide semiconductors (AOSs) are of great current interest for thin-film transistor (TFT) channel layer applications. In particular, indium gallium zinc oxide (IGZO) is under intense development ...

  Citation × Citation Citation Abstract Copy Title: Instability and temperature-dependence assessment of IGZO TFTs Author: Hoshino, Ken Amorphous oxide semiconductors (AOSs) are of great current interest for thin-film transistor (TFT) channel layer applications. In particular, indium gallium zinc oxide (IGZO) is under intense development for commercial applications because of its demonstrated high performance at low processing temperatures. The objective of the research presented in this thesis is to provide detailed assessments of device stability, temperature dependence, and related phenomena for IGZO-based TFTs processed at temperatures between 200 °C and 300 °C. TFTs tested exhibit an almost rigid shift in log₁₀(I[subscript D]) – V[subscript GS] transfer curves in which the turn-on voltage, V[subscript ON], moves to a more positive gate voltage with increasing stress time during constant-voltage bias-stress testing of IGZO TFTs. TFT stability is improved as the post-deposition annealing temperature increases over the temperature range of 200 – 300 ºC. The turn-on voltage shift induced by constant-voltage bias-stressing is at least partially reversible; V[subscript ON] tends to recover towards its initial value of V[subscript ON] if the TFT is left unbiased in the dark for a prolonged period of time and better recovery is observed for a longer recovery period. V[subscript ON] for a TFT can be set equal to zero after bias-stress testing if the TFT electrodes are grounded and the TFT is maintained in the dark for a prolonged period of time. Attempts to accelerate the recovery process by application of a negative gate bias at elevated temperature (i.e., 100 ºC) were unsuccessful, resulting in severely degraded subthreshold swing. An almost rigid log₁₀(I[subscript D]) – V[subscript GS] transfer curve shift to a lower (more negative) V[subscript ON] with increasing temperature is observed in the range of –50 °C to +50 °C, except for a TFT with an initial V[subscript ON] equal to zero, in which case the log₁₀(ID) – V[subscript GS] transfer curve is temperature-independent. A more detailed temperature-dependence assessment, however, indicates that the log₁₀(I[subscript D]) – V[subscript GS] transfer curve shift is not exactly rigid since the mobility is found to increase slightly with increasing temperature. A noticeable anomaly is observed in certain log₁₀(I[subscript D]) – VGS transfer curves, especially when obtained at elevated temperature (e.g., 30 and 50 ºC), in which I[subscript D] decreases precipitously near zero volts in the positive gate voltage sweep. This anomaly is attributed to a gate-voltage-step-involved detrapping and subsequent retrapping of electrons in the accumulation channel and/or channel/gate insulator interface. In fact, all IGZO TFT stability and temperature-dependence trends are attributed to channel interface and/or channel bulk trapping/detrapping. Title: Instability and temperature-dependence assessment of IGZO TFTs Author: Hoshino, Ken Amorphous oxide semiconductors (AOSs) are of great current interest for thin-film transistor (TFT) channel layer applications. In particular, indium gallium zinc oxide (IGZO) is under intense development for commercial applications because of its demonstrated high performance at low processing temperatures. The objective of the research presented in this thesis is to provide detailed assessments of device stability, temperature dependence, and related phenomena for IGZO-based TFTs processed at temperatures between 200 °C and 300 °C. TFTs tested exhibit an almost rigid shift in log₁₀(I[subscript D]) – V[subscript GS] transfer curves in which the turn-on voltage, V[subscript ON], moves to a more positive gate voltage with increasing stress time during constant-voltage bias-stress testing of IGZO TFTs. TFT stability is improved as the post-deposition annealing temperature increases over the temperature range of 200 – 300 ºC. The turn-on voltage shift induced by constant-voltage bias-stressing is at least partially reversible; V[subscript ON] tends to recover towards its initial value of V[subscript ON] if the TFT is left unbiased in the dark for a prolonged period of time and better recovery is observed for a longer recovery period. V[subscript ON] for a TFT can be set equal to zero after bias-stress testing if the TFT electrodes are grounded and the TFT is maintained in the dark for a prolonged period of time. Attempts to accelerate the recovery process by application of a negative gate bias at elevated temperature (i.e., 100 ºC) were unsuccessful, resulting in severely degraded subthreshold swing. An almost rigid log₁₀(I[subscript D]) – V[subscript GS] transfer curve shift to a lower (more negative) V[subscript ON] with increasing temperature is observed in the range of –50 °C to +50 °C, except for a TFT with an initial V[subscript ON] equal to zero, in which case the log₁₀(ID) – V[subscript GS] transfer curve is temperature-independent. A more detailed temperature-dependence assessment, however, indicates that the log₁₀(I[subscript D]) – V[subscript GS] transfer curve shift is not exactly rigid since the mobility is found to increase slightly with increasing temperature. A noticeable anomaly is observed in certain log₁₀(I[subscript D]) – VGS transfer curves, especially when obtained at elevated temperature (e.g., 30 and 50 ºC), in which I[subscript D] decreases precipitously near zero volts in the positive gate voltage sweep. This anomaly is attributed to a gate-voltage-step-involved detrapping and subsequent retrapping of electrons in the accumulation channel and/or channel/gate insulator interface. In fact, all IGZO TFT stability and temperature-dependence trends are attributed to channel interface and/or channel bulk trapping/detrapping. Close

• 2. [Article] Synthesis and characterization of aluminum oxide based materials - from molecule to device

  A scalable synthesis of the "flat" tridecameric inorganic cluster [Al₁₃(μ₃-OH)₆(μ-OH)₁₈(H₂O)₂₄]¹⁵⁺ has been realized by treating an aqueous aluminum nitrate solution with zinc-metal powder at room temperature. ...

  Citation × Citation Citation Abstract Copy Title: Synthesis and characterization of aluminum oxide based materials - from molecule to device Author: Wang, Wei A scalable synthesis of the "flat" tridecameric inorganic cluster [Al₁₃(μ₃-OH)₆(μ-OH)₁₈(H₂O)₂₄]¹⁵⁺ has been realized by treating an aqueous aluminum nitrate solution with zinc-metal powder at room temperature. Single crystals and polycrystalline samples are readily obtained in yields exceeding 55% relative to the starting reagent Al(NO₃)₃. Products have been characterized by X-ray diffraction and solid-state ²⁷Al MAS and MQMAS NMR. Furthermore, we report a new integrated platform that combines: (i) an atom- & step-economical electrolytic synthesis of Al-containing nanoclusters in water with strict pH control; and (ii) an improved femtosecond stimulated Raman spectroscopic method covering a broad spectral range (350 to 1400 cm⁻¹), aided by ab-initio computations, to elucidate cluster structures and formation mechanisms of the clusters in real time. Using this platform, a new and unique view of flat [Al₁₃(μ₃-OH)₆(μ₂-OH)₁₈(H₂O)₂₄](NO₃)₁₅ cluster formation is observed, in which three distinct stages are identified. The first stage involves the formation of a hypothetical [Al₇(μ₃-OH)₆(μ₂-OH)₆(H₂O)₁₂]⁹⁺ structure as an important intermediate towards the flat Al₁₃. Once the scalable synthesis has been developed, aqueous solution precursor made from "flat" Al₁₃ clusters are used for depositing high quality aluminum oxide thin films. Film structure, morphology, composition, and density at different annealing temperature are characterized by X-ray diffraction, AFM, SEM, TEM, FTIR, and X-ray Reflectivity. Optical properties of the films are investigated by spectroscopic ellipsometry. Simple metal-insulator-semiconductor capacitor test structure is used to evaluate the dielectric properties of the aluminum oxide thin films. After annealing at 500 °C, thin film exhibits low leakage current density (< 10 nA·cm⁻² at 1 MV·cm⁻¹) and high breakdown field (> 6 MV·cm⁻¹). As a gate dielectric layer in thin film transistors with amorphous zinc tin oxide active channel, solution processed aluminum oxide layer exhibit dielectric properties similar to high quality SiO₂ gate dielectrics, i.e. low gate leakage current (nA level from -10 V to 30 V) and small clockwise hysteresis. Finally, thin film dielectric material Al(PO₄)₀.₆O₀.₆·xH₂O, or "AlPO" is examined to explore a low-temperature dehydration alternative for the solution-deposited aluminun-oxide based films. As an amorphous oxide insulator, AlPO has been incorporated into thin-film transistors (TFT) via aqueous processing. It is found that the films must be heated above 600 °C to force dehydration and eliminate the mobile protons that cause unstable device operation. Here, we suggest that this dehydration temperature is largely dictated by rearrangements and densification near the surface of the film, as it is heated. A considerable quantity of water (and associated ions) becomes physically trapped in the bulk of the film. High temperatures are then required to promote diffusion and water loss across this surface "crust". A hypothesis is that an appropriate very thin layer of a material having a lower dehydration temperature could be used to inhibit the densification and drying of AlPO in the near-surface region, thereby facilitating continuous water loss at relatively low temperature. Therefore, we choose solution-deposited HfO₂ films to alter the AlPO top surface. This material combination effectively decreases the dehydration temperature of AlPO (at about 250 °C), leading to dramatically changes in the dielectric behavior. Title: Synthesis and characterization of aluminum oxide based materials - from molecule to device Author: Wang, Wei A scalable synthesis of the "flat" tridecameric inorganic cluster [Al₁₃(μ₃-OH)₆(μ-OH)₁₈(H₂O)₂₄]¹⁵⁺ has been realized by treating an aqueous aluminum nitrate solution with zinc-metal powder at room temperature. Single crystals and polycrystalline samples are readily obtained in yields exceeding 55% relative to the starting reagent Al(NO₃)₃. Products have been characterized by X-ray diffraction and solid-state ²⁷Al MAS and MQMAS NMR. Furthermore, we report a new integrated platform that combines: (i) an atom- & step-economical electrolytic synthesis of Al-containing nanoclusters in water with strict pH control; and (ii) an improved femtosecond stimulated Raman spectroscopic method covering a broad spectral range (350 to 1400 cm⁻¹), aided by ab-initio computations, to elucidate cluster structures and formation mechanisms of the clusters in real time. Using this platform, a new and unique view of flat [Al₁₃(μ₃-OH)₆(μ₂-OH)₁₈(H₂O)₂₄](NO₃)₁₅ cluster formation is observed, in which three distinct stages are identified. The first stage involves the formation of a hypothetical [Al₇(μ₃-OH)₆(μ₂-OH)₆(H₂O)₁₂]⁹⁺ structure as an important intermediate towards the flat Al₁₃. Once the scalable synthesis has been developed, aqueous solution precursor made from "flat" Al₁₃ clusters are used for depositing high quality aluminum oxide thin films. Film structure, morphology, composition, and density at different annealing temperature are characterized by X-ray diffraction, AFM, SEM, TEM, FTIR, and X-ray Reflectivity. Optical properties of the films are investigated by spectroscopic ellipsometry. Simple metal-insulator-semiconductor capacitor test structure is used to evaluate the dielectric properties of the aluminum oxide thin films. After annealing at 500 °C, thin film exhibits low leakage current density (< 10 nA·cm⁻² at 1 MV·cm⁻¹) and high breakdown field (> 6 MV·cm⁻¹). As a gate dielectric layer in thin film transistors with amorphous zinc tin oxide active channel, solution processed aluminum oxide layer exhibit dielectric properties similar to high quality SiO₂ gate dielectrics, i.e. low gate leakage current (nA level from -10 V to 30 V) and small clockwise hysteresis. Finally, thin film dielectric material Al(PO₄)₀.₆O₀.₆·xH₂O, or "AlPO" is examined to explore a low-temperature dehydration alternative for the solution-deposited aluminun-oxide based films. As an amorphous oxide insulator, AlPO has been incorporated into thin-film transistors (TFT) via aqueous processing. It is found that the films must be heated above 600 °C to force dehydration and eliminate the mobile protons that cause unstable device operation. Here, we suggest that this dehydration temperature is largely dictated by rearrangements and densification near the surface of the film, as it is heated. A considerable quantity of water (and associated ions) becomes physically trapped in the bulk of the film. High temperatures are then required to promote diffusion and water loss across this surface "crust". A hypothesis is that an appropriate very thin layer of a material having a lower dehydration temperature could be used to inhibit the densification and drying of AlPO in the near-surface region, thereby facilitating continuous water loss at relatively low temperature. Therefore, we choose solution-deposited HfO₂ films to alter the AlPO top surface. This material combination effectively decreases the dehydration temperature of AlPO (at about 250 °C), leading to dramatically changes in the dielectric behavior. Close

• 3. [Article] Low-temperature, Inkjet-printed p-Type Copper(I) Iodide-based Thin-Film Transistors

  Inkjet-printed p-type copper(I) iodide-based TFTs were successfully fabricated. As-printed copper(I) halide semiconductor films, such as CuI, CuBrI, and CuClI, were used as p-type active channel layers ...

  Citation × Citation Citation Abstract Copy Title: Low-temperature, Inkjet-printed p-Type Copper(I) Iodide-based Thin-Film Transistors Author: Gorecki, Jenna Y. Inkjet-printed p-type copper(I) iodide-based TFTs were successfully fabricated. As-printed copper(I) halide semiconductor films, such as CuI, CuBrI, and CuClI, were used as p-type active channel layers for TFTs. The entire process of the TFTs fabrication was maintained under 150 °C, which is compatible with flexible plastic substrates and transparent glass substrate. Various printing temperatures, drop spacing, W/L ratios, and TFT structures were tested in order to find the optimum device properties for p-type copper(I) iodide-based TFT. In addition, inkjet-printed CuI, CuBrI, and CuClI films were characterized to study optical, electrical, and morphological properties. Furthermore, device performance of printed copper(I) iodide-based p-type TFTs was also investigated. Among them, CuI TFTs with SU-8 encapsulation exhibited outstanding p-type transistor behaviours with field-effect mobility as high as 4.36 cm² V⁻¹ s⁻¹ and Ion/Ioff ratio of 103.24 on the silicon substrate. Also, CuBrI TFTs resulted in successful p-type transistor behaviours with average field-effect mobility of 2.4 cm² V⁻¹ s⁻¹ and I[subscript on]/I[subscript off] ratio of 101.9 on the glass substrates when the molar ratio of CuBr:CuI was 1:1. In addition, CuClI TFTs were successfully fabricated with field-effect mobility as high as 1.02 cm² V⁻¹ s⁻¹ and I[subscript on]/I[subscript off] ratio of 10⁰·⁷³ on the silicon substrates when the molar ratio of CuCl:CuI was 1:9. The device performances were comparable to reported p-type metal oxide TFTs. This study suggests promising candidates of low-temperature printed p-type TFTs that can be used for complementary inorganic circuits. Title: Low-temperature, Inkjet-printed p-Type Copper(I) Iodide-based Thin-Film Transistors Author: Gorecki, Jenna Y. Inkjet-printed p-type copper(I) iodide-based TFTs were successfully fabricated. As-printed copper(I) halide semiconductor films, such as CuI, CuBrI, and CuClI, were used as p-type active channel layers for TFTs. The entire process of the TFTs fabrication was maintained under 150 °C, which is compatible with flexible plastic substrates and transparent glass substrate. Various printing temperatures, drop spacing, W/L ratios, and TFT structures were tested in order to find the optimum device properties for p-type copper(I) iodide-based TFT. In addition, inkjet-printed CuI, CuBrI, and CuClI films were characterized to study optical, electrical, and morphological properties. Furthermore, device performance of printed copper(I) iodide-based p-type TFTs was also investigated. Among them, CuI TFTs with SU-8 encapsulation exhibited outstanding p-type transistor behaviours with field-effect mobility as high as 4.36 cm² V⁻¹ s⁻¹ and Ion/Ioff ratio of 103.24 on the silicon substrate. Also, CuBrI TFTs resulted in successful p-type transistor behaviours with average field-effect mobility of 2.4 cm² V⁻¹ s⁻¹ and I[subscript on]/I[subscript off] ratio of 101.9 on the glass substrates when the molar ratio of CuBr:CuI was 1:1. In addition, CuClI TFTs were successfully fabricated with field-effect mobility as high as 1.02 cm² V⁻¹ s⁻¹ and I[subscript on]/I[subscript off] ratio of 10⁰·⁷³ on the silicon substrates when the molar ratio of CuCl:CuI was 1:9. The device performances were comparable to reported p-type metal oxide TFTs. This study suggests promising candidates of low-temperature printed p-type TFTs that can be used for complementary inorganic circuits. Close

• 4. [Article] Contact resistance and stability assessment of oxide-based thin film transistors

  This thesis focuses on two aspects of oxide-based thin-film transistors (TFTs), contact resistance and instability assessment. First, determination of the contact resistance of indium tin oxide (ITO) on ...

  Citation × Citation Citation Abstract Copy Title: Contact resistance and stability assessment of oxide-based thin film transistors Author: Hung, Celia M. This thesis focuses on two aspects of oxide-based thin-film transistors (TFTs), contact resistance and instability assessment. First, determination of the contact resistance of indium tin oxide (ITO) on two wide-band gap semiconductors, zinc oxide (ZnO) and indium gallium oxide (IGO), is attempted and the effects of contact resistance on device performance is investigated. Both transistor and transfer length method (TLM) structures are used in the study and three material systems are employed: ZnO on SiO2, ZnO on aluminum titanium oxide (ATO), and IGO on SiO2. It is found that the measured resistance is not dominated by contact resistance effects. It is concluded that the device dimensions used in this study (i.e., gate lengths of 50 to 200 μm) are too large to yield an accurate estimate of the contact resistance, since it is so small. Second, a methodology for assessing the stability of oxide-based TFTs is developed and implemented. This methodology involves constant voltage stressing over a maximum duration of 105 s (i.e., ~ 28 hours) and periodic evaluation of drain current-drain voltage and drain current-gate voltage characteristics during the stability test. This stability assessment strategy is first applied to three semiconducting materials: ZnO, zinc indium oxide (ZIO), and IGO, using thermal silicon oxide as the gate dielectric. Similar trends are observed for these device types. Relatively stable devices are obtained after post-deposition annealing at a temperature of ~ 600 °C for ZnO and IGO TFTs, and ~ 400 °C for ZIO TFTs. The presence of instability in these devices, which is more pronounced at a lower annealing temperature, results in a positive shift in the turn-on voltage and clockwise hysteresis in the drain current-gate voltage transfer curve. Such an instability is attributed to electron trapping near the channel/insulator interface. The stability a ZnO TFT fabricated using a spin-coat synthesized aluminum phosphate (AlPO) as the gate dielectric is also investigated. The ZnO/AlPO TFT showed distinctively different stability trends. This device is observed to be very unstable with a negative shift in the turn-on voltage and counter-clockwise hysteresis in the drain current-gate voltage transfer curve. The mechanism for this instability is ascribed to insulator ion drift. It is shown that stable TFTs can be fabricated with oxide-based channel layers if a high quality insulator, such as thermal silicon dioxide, is available and if a post-deposition anneal at an elevated temperature is employed. Title: Contact resistance and stability assessment of oxide-based thin film transistors Author: Hung, Celia M. This thesis focuses on two aspects of oxide-based thin-film transistors (TFTs), contact resistance and instability assessment. First, determination of the contact resistance of indium tin oxide (ITO) on two wide-band gap semiconductors, zinc oxide (ZnO) and indium gallium oxide (IGO), is attempted and the effects of contact resistance on device performance is investigated. Both transistor and transfer length method (TLM) structures are used in the study and three material systems are employed: ZnO on SiO2, ZnO on aluminum titanium oxide (ATO), and IGO on SiO2. It is found that the measured resistance is not dominated by contact resistance effects. It is concluded that the device dimensions used in this study (i.e., gate lengths of 50 to 200 μm) are too large to yield an accurate estimate of the contact resistance, since it is so small. Second, a methodology for assessing the stability of oxide-based TFTs is developed and implemented. This methodology involves constant voltage stressing over a maximum duration of 105 s (i.e., ~ 28 hours) and periodic evaluation of drain current-drain voltage and drain current-gate voltage characteristics during the stability test. This stability assessment strategy is first applied to three semiconducting materials: ZnO, zinc indium oxide (ZIO), and IGO, using thermal silicon oxide as the gate dielectric. Similar trends are observed for these device types. Relatively stable devices are obtained after post-deposition annealing at a temperature of ~ 600 °C for ZnO and IGO TFTs, and ~ 400 °C for ZIO TFTs. The presence of instability in these devices, which is more pronounced at a lower annealing temperature, results in a positive shift in the turn-on voltage and clockwise hysteresis in the drain current-gate voltage transfer curve. Such an instability is attributed to electron trapping near the channel/insulator interface. The stability a ZnO TFT fabricated using a spin-coat synthesized aluminum phosphate (AlPO) as the gate dielectric is also investigated. The ZnO/AlPO TFT showed distinctively different stability trends. This device is observed to be very unstable with a negative shift in the turn-on voltage and counter-clockwise hysteresis in the drain current-gate voltage transfer curve. The mechanism for this instability is ascribed to insulator ion drift. It is shown that stable TFTs can be fabricated with oxide-based channel layers if a high quality insulator, such as thermal silicon dioxide, is available and if a post-deposition anneal at an elevated temperature is employed. Close

• 5. [Article] Investigation of low temperature solution-based deposition process for flexible electronics

  The critical contribution of this dissertation is to provide a better understanding of the fundamental Chemical Bath Deposition (CBD) growth kinetic and mechanism for the well known II-VI semiconductor ...

  Citation × Citation Citation Abstract Copy Title: Investigation of low temperature solution-based deposition process for flexible electronics Author: Chang, Yu-Jen The critical contribution of this dissertation is to provide a better understanding of the fundamental Chemical Bath Deposition (CBD) growth kinetic and mechanism for the well known II-VI semiconductor CdS using the newly developed continuous flow microreactor. This continuous flow microreactor provides the temporal resolution to control the homogeneous reaction of the chemical solution before it impinges on the substrate surface. This capability was used to decouple the homogeneous particle formation and deposition from the molecular level heterogeneous surface reaction to overcome the drawbacks associated with a conventional batch process. Transmission electron microscopy (TEM) analysis indicated an impinging flux without the formation of nanoparticles which could be obtained from this reactor in a short residence time. In addition, the reactor could be operated in a homogeneous particle formation regime. Size increasing CdS nanoparticles grown by homogeneous reaction were clearly observed from TEM and SEM micrographs by increasing the residence time from 1 to 280 sec using pre-heated precursor solutions. The formation of CdS nanorod and arrayed nanorod bundle structures using the CBD recipe were also observed in some areas and reported here for the first time. The growth kinetics were studied using a particle-free flux. The deposition results suggest that HS− ions formed through the thiourea hydrolysis reaction are the dominant sulfide ion source responsible for the CdS deposition rather than thioura itself that had been widely discussed in almost all of the previous literature. This finding could not be observed previously by a conventional CBD batch setup because all the reactant solutions were sequentially pulled into the reaction beaker and mixed all at once. An impinging flux without the formation of nanoparticles enables us to deposit extremely smooth and highly oriented nanocrystalline CdS semiconductor thin films at low temperature (80°C). Enhancement-mode functional thin film transistors with an effective mobility of μ[subscript eff] =1.46 cm²/V s, drain current on-to-off ratio of approximately 10⁵ and turn-on voltage at 0 V were fabricated from the asdeposited films without any post annealing process. This microreactor could be adapted for the deposition of other compound semiconductor thin films such as highly transparent amorphous Indium Oxide (In₂O₃) thin films at low temperature (70°C) using chemical solution deposition and opens a low-cost avenue to fabricate thin film flexible electronics on polymeric substrates. Title: Investigation of low temperature solution-based deposition process for flexible electronics Author: Chang, Yu-Jen The critical contribution of this dissertation is to provide a better understanding of the fundamental Chemical Bath Deposition (CBD) growth kinetic and mechanism for the well known II-VI semiconductor CdS using the newly developed continuous flow microreactor. This continuous flow microreactor provides the temporal resolution to control the homogeneous reaction of the chemical solution before it impinges on the substrate surface. This capability was used to decouple the homogeneous particle formation and deposition from the molecular level heterogeneous surface reaction to overcome the drawbacks associated with a conventional batch process. Transmission electron microscopy (TEM) analysis indicated an impinging flux without the formation of nanoparticles which could be obtained from this reactor in a short residence time. In addition, the reactor could be operated in a homogeneous particle formation regime. Size increasing CdS nanoparticles grown by homogeneous reaction were clearly observed from TEM and SEM micrographs by increasing the residence time from 1 to 280 sec using pre-heated precursor solutions. The formation of CdS nanorod and arrayed nanorod bundle structures using the CBD recipe were also observed in some areas and reported here for the first time. The growth kinetics were studied using a particle-free flux. The deposition results suggest that HS− ions formed through the thiourea hydrolysis reaction are the dominant sulfide ion source responsible for the CdS deposition rather than thioura itself that had been widely discussed in almost all of the previous literature. This finding could not be observed previously by a conventional CBD batch setup because all the reactant solutions were sequentially pulled into the reaction beaker and mixed all at once. An impinging flux without the formation of nanoparticles enables us to deposit extremely smooth and highly oriented nanocrystalline CdS semiconductor thin films at low temperature (80°C). Enhancement-mode functional thin film transistors with an effective mobility of μ[subscript eff] =1.46 cm²/V s, drain current on-to-off ratio of approximately 10⁵ and turn-on voltage at 0 V were fabricated from the asdeposited films without any post annealing process. This microreactor could be adapted for the deposition of other compound semiconductor thin films such as highly transparent amorphous Indium Oxide (In₂O₃) thin films at low temperature (70°C) using chemical solution deposition and opens a low-cost avenue to fabricate thin film flexible electronics on polymeric substrates. Close

• 6. [Article] Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications

  Thin-film transistors (TFTs) are primarily used as a switching element in liquid crystal displays. Currently, amorphous silicon is the dominant TFT technology for displays, but higher performance TFTs ...

  Citation × Citation Citation Abstract Copy Title: Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications Author: Rajachidambaram, Jaana Saranya Thin-film transistors (TFTs) are primarily used as a switching element in liquid crystal displays. Currently, amorphous silicon is the dominant TFT technology for displays, but higher performance TFTs will become necessary to enable ultra-definition resolution high-frequency large-area displays. Amorphous zinc tin oxide (ZTO) TFTs were fabricated by RF magnetron sputter deposition. In this study, the effect of both deposition and post annealing conditions have been evaluated in regards to film structure, composition, surface contamination, and device performance. Both the variation of oxygen partial pressure during deposition and the temperature of the post-deposition annealing were found to have a significant impact on TFT properties. X-ray diffraction data indicated that the ZTO films remain amorphous even after annealing to 600° C. Rutherford backscattering spectrometry indicated that the Zn:Sn ratio of the films was ~1.7:1 which is slightly tin rich compared to the sputter target composition. X-ray photoelectron spectroscopy data indicated that the films had significant surface contamination and that the Zn:Sn ratios changed depending on sample annealing conditions. Electrical characterization of ZTO films using TFT test structures indicated that mobilities as high as 17 cm² V⁻¹ s⁻¹ could be obtained for depletion mode devices. It was determined that the electrical properties of ZTO films can be precisely controlled by varying the deposition conditions and annealing temperature. It was found that the ZTO electrical properties could be controlled where insulating, semiconducting and conducting films could be prepared. This precise control of electrical properties allowed us to incorporate sputter deposited ZTO films into resistive random access memory (RRAM) devices. RRAM are two terminal nonvolatile data memory devices that are very promising for the replacement of silicon-based Flash. These devices exhibited resistive switching between high-resistance states to low-resistance states and low-resistance states to high-resistance states depending on polarity of applied voltages and current compliance settings. The device switching was fundamentally related to the defect states and material properties of metal and insulator layers, and their interfaces in the metalinsulator-metal (MIM) structure. Title: Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications Author: Rajachidambaram, Jaana Saranya Thin-film transistors (TFTs) are primarily used as a switching element in liquid crystal displays. Currently, amorphous silicon is the dominant TFT technology for displays, but higher performance TFTs will become necessary to enable ultra-definition resolution high-frequency large-area displays. Amorphous zinc tin oxide (ZTO) TFTs were fabricated by RF magnetron sputter deposition. In this study, the effect of both deposition and post annealing conditions have been evaluated in regards to film structure, composition, surface contamination, and device performance. Both the variation of oxygen partial pressure during deposition and the temperature of the post-deposition annealing were found to have a significant impact on TFT properties. X-ray diffraction data indicated that the ZTO films remain amorphous even after annealing to 600° C. Rutherford backscattering spectrometry indicated that the Zn:Sn ratio of the films was ~1.7:1 which is slightly tin rich compared to the sputter target composition. X-ray photoelectron spectroscopy data indicated that the films had significant surface contamination and that the Zn:Sn ratios changed depending on sample annealing conditions. Electrical characterization of ZTO films using TFT test structures indicated that mobilities as high as 17 cm² V⁻¹ s⁻¹ could be obtained for depletion mode devices. It was determined that the electrical properties of ZTO films can be precisely controlled by varying the deposition conditions and annealing temperature. It was found that the ZTO electrical properties could be controlled where insulating, semiconducting and conducting films could be prepared. This precise control of electrical properties allowed us to incorporate sputter deposited ZTO films into resistive random access memory (RRAM) devices. RRAM are two terminal nonvolatile data memory devices that are very promising for the replacement of silicon-based Flash. These devices exhibited resistive switching between high-resistance states to low-resistance states and low-resistance states to high-resistance states depending on polarity of applied voltages and current compliance settings. The device switching was fundamentally related to the defect states and material properties of metal and insulator layers, and their interfaces in the metalinsulator-metal (MIM) structure. Close

• 7. [Article] Development of oxide semiconductors : materials, devices, and integration

  The aim of this dissertation is to develop oxide semiconductors by radio-frequency sputtering for thin-film transistor (TFT) applications. A variety of oxide semiconductors are used as the TFT channel ...

  Citation × Citation Citation Abstract Copy Title: Development of oxide semiconductors : materials, devices, and integration Author: Chiang, Hai Q. The aim of this dissertation is to develop oxide semiconductors by radio-frequency sputtering for thin-film transistor (TFT) applications. A variety of oxide semiconductors are used as the TFT channel layer, including indium gallium oxide (IGO), zinc tin oxide (ZTO), and indium gallium zinc oxide (IGZO). The variety of materials used underscores the abundance of materials options available within this nascent technology, with each material exhibiting unique chemical, mechanical, and electrical properties. The influence of several deposition parameters is explored; oxygen partial pressure of the deposition ambient is found to have a profound effect on the electrical characteristics of each material. With optimized deposition conditions, TFTs based on these materials exhibit excellent electrical properties, even when annealed at low-temperature (175 °C). Specifically, ZTO-based TFTs which are subjected to a 175 °C post-deposition anneal exhibit a channel mobility near 9 cm²V⁻¹s⁻¹. However, advancement of this technology also requires research in integration-related issues. Therefore, the effect of channel layer passivation and of TFT stability is evaluated. Passivation of the oxide semiconductor surface is required for circuits which employ multiple levels of interconnect and for mechanical/chemical protection of devices. Here, successful passivation of IGO, ZTO, and IGZO-based TFTs is demonstrated using SU-8, a negative tone epoxy-based photoresist. To appraise TFT stability, a constant voltage bias stress test of 1000 minutes is utilized, where the drain current, ID, is monitored throughout the duration of testing and the turn-on voltage, Von, is evaluated before and after stressing. TFT stability is found to be correlated to the turn-on voltage of a device and to the thickness of the semiconductor layer. IGZO-based TFTs with excellent stability are demonstrated, exhibiting almost no decrease in ID or any shift in Von throughout the duration of bias stress testing. Title: Development of oxide semiconductors : materials, devices, and integration Author: Chiang, Hai Q. The aim of this dissertation is to develop oxide semiconductors by radio-frequency sputtering for thin-film transistor (TFT) applications. A variety of oxide semiconductors are used as the TFT channel layer, including indium gallium oxide (IGO), zinc tin oxide (ZTO), and indium gallium zinc oxide (IGZO). The variety of materials used underscores the abundance of materials options available within this nascent technology, with each material exhibiting unique chemical, mechanical, and electrical properties. The influence of several deposition parameters is explored; oxygen partial pressure of the deposition ambient is found to have a profound effect on the electrical characteristics of each material. With optimized deposition conditions, TFTs based on these materials exhibit excellent electrical properties, even when annealed at low-temperature (175 °C). Specifically, ZTO-based TFTs which are subjected to a 175 °C post-deposition anneal exhibit a channel mobility near 9 cm²V⁻¹s⁻¹. However, advancement of this technology also requires research in integration-related issues. Therefore, the effect of channel layer passivation and of TFT stability is evaluated. Passivation of the oxide semiconductor surface is required for circuits which employ multiple levels of interconnect and for mechanical/chemical protection of devices. Here, successful passivation of IGO, ZTO, and IGZO-based TFTs is demonstrated using SU-8, a negative tone epoxy-based photoresist. To appraise TFT stability, a constant voltage bias stress test of 1000 minutes is utilized, where the drain current, ID, is monitored throughout the duration of testing and the turn-on voltage, Von, is evaluated before and after stressing. TFT stability is found to be correlated to the turn-on voltage of a device and to the thickness of the semiconductor layer. IGZO-based TFTs with excellent stability are demonstrated, exhibiting almost no decrease in ID or any shift in Von throughout the duration of bias stress testing. Close

• 8. [Article] Fabrication process assessment and negative bias illumination stress study of IGZO and ZTO TFTs

  Indium-gallium-zinc oxide (IGZO) and zinc-tin oxide (ZTO) are investigated for thin-film transistor (TFT) applications. Negative bias illumination stress (NBIS) is employed for electrical stability assessment. ...

  Citation × Citation Citation Abstract Copy Title: Fabrication process assessment and negative bias illumination stress study of IGZO and ZTO TFTs Author: Hoshino, Ken Indium-gallium-zinc oxide (IGZO) and zinc-tin oxide (ZTO) are investigated for thin-film transistor (TFT) applications. Negative bias illumination stress (NBIS) is employed for electrical stability assessment. Unpassivated IGZO and ZTO TFTs suffer from severe NBIS instabilities. Zinc-tin-silicon oxide is found to be an effective passivation layer for IGZO and ZTO TFTs, significantly improving the NBIS stability. NBIS instabilities in unpassivated TFTs are attributed to an NBIS-induced desorption of chemisorbed oxygen from the channel layer top surface, exposing surface oxygen vacancies. A ZTSO layer protects the channel layer top surface from adsorbed gas interactions and also appears to reduce the density of oxygen vacancies. The best device architectures investigated with respect to TFT electrical performance are found to be staggered with aluminum electrodes for unpassivated TFTs and coplanar with ITO electrodes for ZTSO-passivated TFTs. Annealing in wet-O₂ is not found to be effective for improving the performance of IGZO or ZTO TFTs or for reducing the post-deposition annealing temperature. Title: Fabrication process assessment and negative bias illumination stress study of IGZO and ZTO TFTs Author: Hoshino, Ken Indium-gallium-zinc oxide (IGZO) and zinc-tin oxide (ZTO) are investigated for thin-film transistor (TFT) applications. Negative bias illumination stress (NBIS) is employed for electrical stability assessment. Unpassivated IGZO and ZTO TFTs suffer from severe NBIS instabilities. Zinc-tin-silicon oxide is found to be an effective passivation layer for IGZO and ZTO TFTs, significantly improving the NBIS stability. NBIS instabilities in unpassivated TFTs are attributed to an NBIS-induced desorption of chemisorbed oxygen from the channel layer top surface, exposing surface oxygen vacancies. A ZTSO layer protects the channel layer top surface from adsorbed gas interactions and also appears to reduce the density of oxygen vacancies. The best device architectures investigated with respect to TFT electrical performance are found to be staggered with aluminum electrodes for unpassivated TFTs and coplanar with ITO electrodes for ZTSO-passivated TFTs. Annealing in wet-O₂ is not found to be effective for improving the performance of IGZO or ZTO TFTs or for reducing the post-deposition annealing temperature. Close